1. Field of the Invention
The invention relates to a memory device and fabrication thereof, and in more particularly to a phase change memory device and a fabrication thereof.
2. Description of the Related Art
Phase change memory devices have many advantages, such as high speed, lower power consumption, high capacity, greater endurance, better process integrity and lower cost. Thus, phase change memory devices can serve as independent or embedded memory devices with high integrity. Due to the described advantages, phase change memory devices can substitute for volatile memory devices, such as SRAM or DRAM, and non-volatile memory devices, such as Flash memory devices.
Phase change memory devices write, read or erase according to different resistance of a phase change material between crystal state and non-crystal state. For example, a phase change layer is applied with a relative high current and short pulse, such as 1 mA with 50 ns, to change from a crystal state to a non-crystal state. Because the non-crystal state phase change layer has higher resistance, such as 105 ohm, the phase change memory device presents a smaller current when applied with a voltage to read. When erasing, the phase change layer is applied with a low current, such as 0.2 mA, for a longer duration, such as 100 ns, to change from a non-crystal state to a crystal state. Since the crystal state phase change layer has lower resistance, such as 103-104 ohm, the phase change memory device presents a higher current when applied with a voltage to read. The phase change memory device operates according the mechanism described.
FIG. 1 shows a conventional T shaped phase change memory device. Referring to FIG. 1, a conventional T-shaped phase change memory device sequentially comprises a bottom electrode 102, a heating electrode 104, a phase change layer 106 and a top electrode 108, wherein the columnar heating electrode 104 connects the phase change layer 106. In a standard phase change memory device, current is determined according to a contact area between an electrode and a phase change layer thereof. In the conventional T shaped phase change memory device, the contact area between the heating electrode 104 and the phase change layer 106 is determined by limits of photolithography, rendering reduction of dimension difficult.
FIG. 2 shows another conventional phase change memory device, in which a heating electrode 202 is disposed horizontally. As shown in FIG. 2, a planar heating electrode 202 is formed on a bottom electrode 204 and an inter-layer dielectric layer 206. The planar heating electrode 202 is patterned in a first direction by lithography, and a phase change layer 208 is then formed to contact the patterned planar heating electrode 202. Thereafter, the phase change layer 208 is patterned in a second direction by lithography to define memory cells of the memory device. Next, a top electrode 210 is formed, electrically connecting the phase change layer 208. In the memory device, the heating electrode 202 is disposed horizontally, and the size of the contact area between the heating electrode 202 and the phase change layer 208 is determined by thickness of the heating electrode 202, which is not limited by lithography. Phase change layer 208 of the phase change memory device, however, is formed by gap filling, negatively affecting endurance and uniformity of contact between the phase change layer 208 and the heating electrode 202 of the phase change memory device.